Design of 7T FinFET based SRAM cell design for nanometer regime

In this paper a 7T FinFET totally differential SRAM cell is designed to achieve stronger switching ability. For read operation P-type gates used for data analysis and transmission gates are used to write operations. In this we used 45nm technology which provides up to 60.8% supply power reduction with greater lowering of power supply when compared with other SRAM cells. The switching ability is increased by bitline replaced by NMOS stack and 7T SRAM cell with single bit line and NMOS stack which are designed and implemented in this paper and no need to charge RBL the power is hence saved.