A Low Offset Dynamic Comparator with Offset Elimination Circuit

A new dynamic comparator with offset elimination circuit is proposed. The offset elimination circuit decreases the influence of the offset voltage effectively and increases the resolution of the comparator. The simulation results show that, if the pre-set offset voltage is 10mV, the offset elimination circuit can decrease to the enough low value, which meets the requirements of the system. The standard deviation of the offset voltage decreases from 7.27mV to 1.15mV with the utilization of the offset elimination circuit in Monte Carlo simulation.