A gm/ID Sizing Method for High-speed Multi-stage Operational Amplifiers with Feedforward-only Compensation

We present a gm/ID-based sizing method for multi-stage operational amplifiers (Op Amps) with feedforward-only compensation. For this class of Op Amps, we have to take into account of the dominant parasitic capacitances in pole-zero analysis. The presented design method combines analytical design equations with the gm/ID tables to facilitate the calculation of the sizing parameters. To enhance the sizing accuracy, we propose to use a three-dimensional lookup table of gds/ID versus both gm/ID and VDS and the current-normalized parasitic capacitance lookup tables, i.e., Cp;q/ID (p; q = D; G; S) versus gm/ID in sizing calculations. We verify by a case study that a high-speed three-stage Op Amp (attaining a GBW beyond 3GHz) can be quickly sized using a TSMC 65nm CMOS technology.