Modeling of general non-uniform on-chip interconnect structures
1999
A simple modeling and characterization approach for typical non-uniform on-chip interconnect structures on lossy substrate is presented. The approach is based on the segmentation of the non-uniform interconnect structure into single and coupled uniform interconnect sections with known characteristics and interconnect discontinuities. The bend discontinuity is characterized by full-wave electromagnetic simulation and equivalent circuit parameters are extracted. The segmentation approach is shown to be sufficiently accurate and useful in simplifying the modeling procedure for non-uniform lossy interconnects. Computational results are presented in frequency and time domain for representative non-uniform interconnect structures on lossy silicon substrate.
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