Processor Design in 3D Die-Stacking Technologies
2007
Three-dimensional die-stacking integration stacks multiple layers of processed silicon with a very high-density, low-latency layer-to-layer interconnect. After presenting a brief background on 3D d...
Keywords:
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI