Quick supply current waveform estimation at gate level using existed cell library information

In nanometer era, the power integrity problem has become one of the critical issues. Although checking this problem at higher level can speedup the analysis, not so many tools are available now due to the limited design information at high levels. Most existing approaches at gate level require extra information of the cell library, which may require extra characterization efforts while migrating to new cell libraries. Therefore, we propose an accurate approach to estimate the supply current waveform of sequential circuits at gate level using existing library information only. The experimental results have shown that the estimation errors of our approach are less than 9% compared to HSPICE results, which are better than the rough estimation in [8].