VLSI implementation of detection of R2 signalization

Abstract This paper analyses the problem of R2 signal detection. The existing solutions in this field are based on digital signal processors or microcontrolers. Our solution is based on an FPGA VLSI chip, which is enabled through the utilization of an appropriate suboptimal detection method. Here, we analyse the quality of detection of various suboptimal detection methods: DMF, BMF, WPD, and SAS. During the simulation analysis, we used the samples from the real signal generator ZTEK 75312 as input signal. Our results indicate that satisfactory detection quality can be obtained even with a relatively large quantization noise. This result allowed a very simple hardware implementation which is also presented in this paper.