Integrating diffusion enhanced silylated resist into a single‐layer resist dynamic random access memory production line

The manufacturing of the next generation of dynamic random access memory (DRAM) will require lithographic capability in the 0.5 μm range. Not surprisingly, their requirements push the limits of optical microlithography, thereby rapidly diminishing the process window. This problem becomes more acute at the end of the line where topography and reflectivity have the largest impact on an already strained processing budget. Surface imaging [G. Taylor and T. Wolf, J. Electrochem. Soc. 127, 2665 (1980)] is less sensitive to topography and reflectivity than conventional lithography. Thus, integrating a surface imaging process into a conventional single‐resist processing line is an attractive option to extend the practical resolution limit of current optical lithography without resorting to more complex multilayer resist schemes or more expensive imaging tools. The diffusion enhanced silylated resist process is the most mature of the surface imaging processes commercially available today. This report addresses int...