High-performance self-aligned graphene transistors fabricated using contamination- and defect-free process

A contamination- and defect-free process is proposed for self-aligned graphene field-effect transistor (GFET) fabrication using a protective gold layer and by its etching. The gold layer serves as an electrode metal for both the source and drain. GFETs fabricated by this method exhibit superior electrical characteristics, such as an intrinsic carrier mobility of 8900 cm2 V−1 s−1 and a series resistance of 1520 Ω µm, which is ascribed to the effective blocking of unwanted contamination and defect formation as well as to the reduction in access length due to the self-aligned configuration. Our approach is quite promising as a device fabrication method for high-performance GFETs.