Scalable fabrication of high performance graphene FETs with self-aligned buried gates

2012 
This paper presents a scalable technique to fabricate high performance graphene transistors with self-aligned buried gates process. Graphene FETs with two different structures have been compared and the buried gated structure shows less fringing capacitance and more reliable contacts. The buried-gate graphene transistor shows field-effect mobility of 6,100 cm 2 /V·s according to the transconductance measurement. This result paves the way for manufacturable high quality graphene transistor technology.
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    14
    References
    1
    Citations
    NaN
    KQI
    []