Who solves the variability problem

Although innovations in manufacturing technology help in reducing variations, IC design variations are a fact of life. In addition to random variations, systematic stress induced variations are becoming increasingly important. This panel will bring the diverse views from academia, foundries, fabless and IDM communities to address various topics on next generation solutions for variability, with the main emphasis on design and architecture solutions. Specifically, this panel will discuss: • Would new architectures mitigate variability in 22nm and beyond? • Could design regularity effectively mitigate variability? • What design techniques can be used to minimize variability 'on-the-fly'? • What new techniques can be used for memories, register arrays and flip-flops?