A high-speed MIM resistive memory cell with an inherent vanadium selector

Abstract Resistive random-access memory (RRAM) structured in crossbar arrays typically use selectors to improve noise margins by suppressing sneak path currents and leakages. Without selectors, crossbar array dimensions would be prohibitively small for practical use in storage-class memory (SCM), and compute-in-memory (CIM) applications. Most one-selector one-resistor (1S1R) memory cells fabricate the selector and RRAM independently. Here, an extremely simple process is presented to construct a 1S1R cell consisting of a metal-insulator-metal (MIM) structure of V/ITO(O2)/TiN, where the unique electrical properties of vanadium form a built-in selector. High vertical stacking density is achieved by removing the need for a separate series-connected selector. Threshold switching (TS) based on metal-insulator transition (MIT) in the vanadium top electrode (TE) selector is observed with a subthreshold swing of under 30 mV/dec. The selector is directly integrated with indium tin oxide (ITO) which provides low-voltage/high-speed resistive switching behavior (set process of