EMC ISSUES OF WIDE PCB BUSES

In terms of Electromagnetic Compatibility (EMC) concerns of digital equipment, one important limiting factor is crosstalk among coupled Printed-Circuit-Board (PCB) traces. Digital systems today may have bus width of 64 bits and more. Crosstalk performance of PCB traces are usually described with only two signal traces. Assuming weak coupling and matched terminations on all four ports, the near-end and far-end crosstalk time-domain waveforms were described in the literature from the early years of computers [1], [2]. Investigation later covered also the frequency-domain description of crosstalk in two-wire and multi-wire digital interconnects [3], [4]. PCB interconnects and digital interconnects in Multi-Chip Modules, leadframes and packaging have much in common, their crosstalk description is similar [5], [6]. In multi-wire digital interconnects, the generalized description of time-domain crosstalk and coupling is based on the modal analysis [7]. Coupling and crosstalk among digital interconnects may be reduced in several ways. Besides to the obvious solution of increasing the separation between adjacent traces, it is possible to use divided dielectric layers in microstrip configurations [8], [9], adding grounded traces between active traces [10], [11], [12], and [13], or by making use of the additional periodical coupling and loading along digital bus systems [14], [15]. Other possibilities of crosstalk reduction includes the special shaping of microstrip traces, see e.g., [16].