Thedesign ofaFASTBUSinterface tothe3081/E ispre- CABLE sented. Theinterface consists oftwoboards, onespecific to SEGMENT FASTBUS, theother usable byother interfaces tothe3081/E. (near side) PROTO TheFASTBUS boardisadual-ported slave, permitting access T FASTBUS LOG fromeither oftwocable segments. Thegeneral purpose board

1986

DRVRS/RCVRS s supports transfers toandfrom3081/E memoryandprovides AD (ns) control ofprogram execution. Italso hasseveral features which n

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