Efficient secure chip power consumption attack test method

2012 
The invention discloses an efficient secure chip power consumption attack test method. When a power consumption attack test is carried out on a secure chip in a design stage, the obtaining and processing method of a power consumption sample includes the steps of (1) obtaining the power consumption sample, (2) pre-processing the power consumption sample, (3) obtaining an assumed power consumption sample, and (4) calculating correlation coefficients and analyzing an attack result. According to the method, only power consumption points which change are sampled, large quantities of power consumption sample data are saved, the power consumption attack calculated amount is substantially reduced, and the method has the advantages of being high in evaluation efficiency and speed. More importantly, the power consumption attack test can be carried out in the design stage of the chip, the risk that the chip is designed again due to the fact that the safety performance of the chip produced in a stream line is not good is reduced and accordingly the design cycle of the secure chip is shortened.
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