New insights on strained-Si on insulator fabrication by top recrystallization of amorphized SiGe on SOI

We demonstrate the fabrication of strained Si-On-Insulator (sSOI) using a relaxation process of a compressive SiGe layer on SOI, and the transfer of lattice parameter from the relaxed SiGe to the Si layer. This process is based on a partial amorphization and recrystallization of the SiGe/Si stack. We used HRXRD (High Resolution X-Ray Diffraction) and TEM (Transmission Electron Microscopy) to characterize the microstructure of the layers. Strain and Stress evolutions throughout the process were determined using Raman spectroscopy and wafer bow measurements. Using a stack of 40 nm Si 0 . 7 Ge 0 . 3 on 9 nm Si, we obtained tensile Si layer having a stress of + 1.6 GPa which corresponds to a 80% lattice parameter transfer from SiGe to Si.