The application of advanced pulsed plasma in Fin etch loading improvement

Following Moore’s law, integrated circuit requires scaling gate length to 14nm and beyond. To enable such gate-length scaling, finFETs have widely replaced planar metal-oxide-semiconductor field-effect transistors (MOSFETs) due to its special 3D structure could provide larger effective channel width and better short channel controllability. However, Fin critical dimension (CD) and profile variation between dense and ISO fin in a conventional etch process can introduce additional device degradation. Therefore, rigorous process loading control in reactive ion etch (RIE) becomes more critical. This paper mainly focused on self-aligned double patterning mandrel etch and fin etch by using advanced pulsed plasma to deliver a well-loading fin.