A Single-Chip 9-32 Mbit/s Read/Write Channel for Disk-Drive Applications

This paper reports on a single-chip read/write channel for disk drive. The integrated circuit implements a peak detector architecture fully compatible with zoned-bit recording applications. The chip contains all the functions needed to implement a high performance read channel like pulse detector, programmable active filter, servo demodulator, frequency synthesizer and data separator. The design take fully advantage of the feature available in a BICMOS technology to achieve power saving, high speed and immunity to cross-talk from digital to analog. The IC is fabricated in a 1.2 ?m BiCMOS technology and has an active area of approximately 28 mm 2 . While operating from a single 5 V supply the power consumption is only 450 mW at 32Mbit/s.