Enhancement of manufacturibility in polycrystalline silicon process by using disilane precursor at 65nm CMOS technology

As integrated circuit manufacturing moves to the 65 nm technology and beyond, it is important to develop a polycrystalline silicon process that has smoother surface topography for optimum transistor performance and device yield. In this paper, we have studied the polycrystalline silicon deposited by rapid thermal chemical vapor deposition (RTCVD) using silane (SiH 4 ) and disilane (Si 2 H 6 ) precursors, at temperatures from 700 °C to 740 °C. The results show that the polycrystalline silicon deposited using disilane precursor has ∼ 50% improvement in the thickness uniformity and ∼25% improvement in surface roughness, as shown by atomic force microscopy (AFM). The grain structure of as-deposited and post-implant and annealed films have been compared by X-ray diffraction (XRD) and Transmission Electron Microscopy (TEM). NMOS and PMOS capacitors have been fabricated with polycrystalline silicon using silane and disilane precursors. The grain structure and electrical parameters, such as gate leakage currents and gate capacitance, show no significant difference between these two precursors. No degradation in particle performance was observed for disilane.