CONSTRUCTING LOW-TEMPERATURE SUB-ARRAYS ON RECONFIGURABLE VLSI ARRAYS

2014 
Increasing temperatures of the processing elements (PEs) on VLSI may threaten the reliability and performance of a hard real-time system. This paper presents a temperature-aware algorithm to reconfigure two-dimensional VLSI arrays in the presence of faulty PEs. Based on dynamic programming, the proposed algorithm constructs each logical column with the lowest temperature for a cool target array on a given processor array. In addition, the lower bound of the temperatures of the cool target array has been established. Simulation results show that the temperatures of target array are reduced without loss of harvest in comparison to the state-of-the-art. Moreover, the produced peak temperature of cool target array is pretty close to the lower bound.
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