The design and analysis of a Miller-divider-based clock generator for MBOA-UWB application
2006
A Miller-divider-based clock generator is proposed for Multi-Band OFDM Alliance (MBOA) ultrawideband (UWB) application. Employing closed-loop operation, the clock generator can produce three different carrier frequencies with negligible in-band spurs. The settling time of the proposed clock generator is analyzed based on a linear feedback system. A transistor sizing optimization technique for active inductors with a current-reusing technique is used to achieve low-power operation and area saving. Fabricated in a 0.18-/spl mu/m technology, the clock generator achieves less than 9.5-ns settling time while dissipating less than 47 mW from a 1.8-V power supply.
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