FP 15.7: A 500Mb/s, 20-Channel CMOS Laser Diode Array Driver for a Parallel Optical Bus

.For the ever-increasing demand of communication bandwidth for clustered computer interconnections, parallel optical bus technology provides a small, lightweight, flexible and low-cost alternative to the existingtechnology [l, 21. A2O-channel,500Mb/s/cha~el CMOS laser diode (LD) driver drives a vertical cavity surface emitting laser (VCSEL) array in a parallel optical bus transmitter. It has a 5OOMb/s low voltage differential signal (LVDS) input interface withwideinput commonmode range. Totaldata throughput islOGb/s. It uses a standard 3.3V power supply with 1.6W of power dissipation, with user features such as on-chip data scrambling and built-in link self-test. The chip architecture is shown in Figure 1. It consists of 20, 5OOMb/s data channels and a full (5OOMHz) and half speed (250MHz) clock interface. All inputs conform to LVDS standard [3]. The chip supports both synchronous and asynchronous modes ofoperation. In the asynchronous mode, the data pass through the chip unlatched in all 20 channels. In the synchronous mode, the input data are retimed and deskewed. The data can also be scrambled in the synchronous mode to improve the reliability of transmissionin the optical link. 18 channels are available for data transfer in this mode. The remaining 2 channels are for transferring the clock signal and the scrambling data. The scrambling pattern is generated by an on-chip pseudo-random bit generator (PRBG). The PRBG also,provides data patterns in a self-testing mode. This enables users to perform low-cost full-speed chip and link level testing.