Can fast rule-based assist feature generation in random-logic contact layout provide sufficient process window?

A two-step full-chip simulation method for optimization of sub-resolution assist feature placement in a random logic Contact layer using ArF immersion Lithography is presented. Process window, characterized by depth of focus (DOF) , of square or rectangular target features is subject to optimization using the optical and resist effects described by calibrated models (Calibre ® nmOPC, nmSRAF simulation platform). By variation of the assist feature dimension and their distance to main feature in a test pattern, a set of comprehensive rules is derived which is applied to generate raw assist features in a random logic layout. Concurrently with the generation of the OPC shapes for the main features, the raw assist feature become modified to maximize process window and to ensure non-printability of the assist features. In this paper, the selection of a test pattern, the generation of a set of "golden" rules of the raw assist feature generation and their implementation as well as the assist feature coverage in a random logic layout is presented and discussed with respect to performance.