Read circuit for semiconductor device

PURPOSE: A read circuit of a semiconductor device is provided to stabilize the operation of the chip though an undesired noise is input by preserving the characteristics of high speed latch sense amplifiers. CONSTITUTION: The circuit includes the latch sense amplifier(40), a current mirror-type sense amplifier(60), a signal delay(50), a comparator(70), a pulse generator(80), a controller(30) and a combinator(90). The latch sense amplifier(40) and the current mirror-type sense amplifier(60), receive output data(DATA, DATAB) output from a memory cell array(20). The signal delay delays the output(SO) of the latch sense amplifier(40). The comparator compares the output(DEO) of the signal delay and the output(SOM) of the current mirror-type sense amplifier. The pulse generator(80) receives the output(COM) of the comparator to output a pulse signal(DSD). The controller(30) generates a sense amplifier control signal driving the current mirror-type sense amplifier. The combinator(90) outputs a latch sense amplifier control signal driving the latch sense amplifier.