High density DRAM for space utilizing embedded DRAMs macros in 32nm SOI CMOS

• Ultra deep submicron SOI CMOS with eDRAM enables space hardened high density memories • Significant benefit for high performance data processors • Techniques exist to mitigate SEE challenges in 32nm SOI CMOS • Reliant on intrinsic TID hardness for high density memory array • Representative data in 45nm SOI suggests should meet required leakage • Many thanks to the DARPA MTO LEAP program for foundry access