Low-frequency noise in III-V high-speed devices

Low-frequency noise results obtained for III-V pseudomorphic high electron mobility transistors (PHEMTs) and heterojunction bipolar transistors (HBTs) are reviewed. The experimental noise set-up is presented and the equivalent circuits of devices including noise sources are established. Excess low-frequency noise comprises 1/f and Lorentzian-type components. An overview of gate and drain low-frequency noise of heterostructure field-effect transistors is provided in the paper. Different activation energy values attributed to traps are also reported. The authors concentrate on the 1/f noise of GaAs-based PHEMTs. The results are analysed with the help of an equivalent circuit deduced from a study of the conduction. The fundamental 1/f noise sources are analysed and modelled according to the different bias range. With regard to HBTs, results for AlGaAs/GaAs, GaInP/GaAs and InP/InGaAs are used for comparison. The effect of the DX centre on the different materials is investigated. The analysis against the bias of the 1/f noise level of the current spectral density referred to the input Si/sub n/ gives information on the origin of the noise. The experimental bias dependencies of Si/sub n/ are compared to those available in the literature and are discussed. The importance of electrical passivation for the improvement of noise is investigated. An analysis of noise against emitter area and emitter perimeter is undertaken for an accurate location of noise sources.