FPGA Based Multiple Fault Tolerant and Recoverable Technique Using Triple Modular Redundancy (FRTMR)

Abstract Triple Modular Redundancy (TMR) is real time reliability known to improve computing systems. This paper presents an approach towards the implementation of a fault tolerant FPGA based technique. Proposed scheme allows the diagnosis of transient and permanent fault affecting systems. This technique allows to easily identify whether a fault affects one of the replicated modules or the technique itself and whether such a fault is permanent or transient. The scheme can effectively recover computing systems from single transient fault w/o introducing any re-computing delay; hence, it is suitable for real time applications. Time taken for identification of the fault and recovery is less than 8 ns. FPGA based fault injection experiment reveal that, the error detection and recovery coverage of 100% and 90% in the presence of single and two faulty models, respectively.