Implementation of wideband CDMA modem using processors and programmable logic devices

1997 
This paper describes the design and implementation of wideband code division multiple access (CDMA) modem of Base Station Transceiver Subsystem (BTS) for a testbed of 4.096 megachips/second (Mcps) CDMA Personal Communication System (PCS). The physical layer of an applied CAI is introduced, and the structure of BTS is explained. The implemented modem consists of programmable logic devices (PLDs) and digital signal processing processors (DSPs) running at 25 mega-instructions per second (MIPS). The modem structure is described, along with functions in DSPs, and computing time of main functions for DSPs to take on the heaviest burden a traffic channel among five kinds of channels, except for searching of code acquisition.
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