High-speed power quality processing unit based on FPGA (field programmable gate array)

2010 
The utility model provides a high-speed power quality processing unit based on FPGA (field programmable gate array), which belongs to the technical field of power supply monitoring and comprises an FPGA chip; the FPGA chip comprises an AD (analog-digital) sampling state machine, a dual-port RAM (random-access memory), an FFT (fast Fourier transform) calculation module, a total root mean square calculation module, a transient detection module, a frequency calculation module, a sampling pulse generating module and a waveform record control module; the FPGA chip is also internally provided with a multi-port memory controller MPMC; the MPMC is respectively connected with the AD (analog-digital)sampling state machine, the frequency calculation module and the waveform record control module through an NPI (network printer interface); the dual-port RAM (random-access memory) is connected with a CPU (central processing unit) through a CPU asynchronous bus; external 1588 pulse input and GPS (global position system) pulse input are respectively connected with the input end of the sampling pulse generating module; the output end of the sampling pulse generating module is connected with the input end of an AD (analog-digital) device through an AD (analog-digital) sampling pulse; the output end of the AD (analog-digital) sampling state machine is connected with the input end of the AD (analog-digital) device through an AD (analog-digital) control bus; the output end of the AD (analog-digital) device is connected with the input end of the AD (analog-digital) sampling state machine through an AD (analog-digital) data bus; and the MPMC is connected with a DDR SDRAM (double data rate synchronous dynamic random access memory) through a DDR (double data rate) bus.
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