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Optimization of a Josephson latching driver using 10-kA/cm2 Nb process for a Josephson-CMOS hybrid memory
Optimization of a Josephson latching driver using 10-kA/cm2 Nb process for a Josephson-CMOS hybrid memory
2020
Hironaka Yuki
Yamanashi Yuki
Yoshikawa Nobuyuki
Keywords:
Optoelectronics
CMOS
Physics
Correction
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