OPTIMIZED DESIGN OF THE SUBBAND STRUCTURE IN MOS INVERSION LAYERS FOR REALIZING HIGH PERFORMANCE AND LOW POWER Si MOSFETS

Enhancement of inversion-layer mobility becomes more important in scaled CMOS from the viewpoints of both higher performance and lower power consumption. The severe influence of inversion-layer capacitance prevents MOSFETs with ultra-thin gate oxides from operating at low supply voltage. This paper presents an engineering scenario of the subband structure in the inversion layer for the enhancement of electron mobility in n-MOSFETs. A key factor is to enlarge the difference in the subband energies of the two-fold and four-fold valleys and, as a result, the electron occupancy of the two-fold valleys. The electrical characteristics of two device structures based on this engineering, strained-Si MOSFETs and SOI MOSFETs with SOI films thinner than the inversion layer of bulk MOSFETs, are shown mainly through theoretical calculations. Advantages and disadvantages of these devices are addressed and the possibility of an alternative device structure, which can overcome the drawbacks, is discussed.