Relation between yield and reliability of integrated circuits and application to failure rate assessment and reduction in the one digit FIT and PPM reliability era

Clear relations have been established between E-sort yield and bum-in, EFR and field failure rates for nearly 50 million high volume products in bipolar, CMOS and BICMOS technologies from different waferfabs. The correlations obey a simple model that assumes that the reliability defect density is a fraction of the waferfab defect density and that rootcauses of failures are the same. The model allows a die size independent prediction and assessment of FIT and PPM reliability levels of an IC just based on its yield, eliminating the need for excessive lifetesting. 'Maverick' batches are identified by more than 2 to 3 rejects per batch and can not be eliminated by scrap of low yielding wafers alone. For non-mature technologies only correlations with functional yield are found, the parametric yield loss can be disregarded. Using the results, it is shown how reliability can be improved in a fast and controlled way, even in the 1 digit FIT and PPM reliability era, by reducing waferfab defect density, elimination of special causes and implementation of screens at product test like voltage screen and Iddq testing. As the effect of yield on PPM reject level is not that strong, the latter approach can be very effective in improving reliability.