Chip packaging structure

The invention discloses a chip packaging structure, comprising a first substrate, a chip, a second substrate, a third substrate, a plurality of electrically conductive protrusions, a plurality of leads and a packaging colloid. The chip is configured on the first substrate. The second substrate is configured on the chip and includes a lead joint face towards the direction away from the chip. The third substrate is configured on the second substrate and includes a solder ball mounting face towards the direction away from the chip. The electrically conductive protrusions are configured between the second substrate and the third substrate so as to electrically connect the second substrate with the third substrate. The second substrate is connected with the first substrate via the leads. The packaging colloid is configured on the first substrate, covers the chip, the leads, the second substrate and the third substrate, and is exposed from the solder ball mounting face of the third substrate.