Simultaneous enlargement of SRAM read/write noise margin by controlling virtual ground lines

The SRAM operating margin in 65nm technology is analyzed. The peak characteristic in the read margin versus the supply voltage was found to be caused by the channel length modulation effect. Controlling the memory cell virtual ground line proved to be effective in enlarging the operating margin simultaneously in the read and the write operations. A simple optimum circuit which does not require any dynamic voltage control is proposed, realizing an improvement in the operating margin comparable to conventional circuits requiring dynamic voltage control.