A transformer-less interleaved four-phase current-fed converter with new voltage multiplier topology

2013 
In this paper, a transformer-less interleaved four-phase current-fed converter with high voltage gain and reduced semiconductor voltage stress is proposed. The proposed topology utilizes input-parallel output-series configuration for providing a much higher voltage gain without adopting an extreme large duty cycle. The proposed converter can not only achieve high step-up voltage gain but also reduce the voltage stress of both active switches and diodes. This will allow one to choose lower voltage rating MOSFETs and diodes to reduce both switching and conduction losses. In addition, due to the charge balance of the blocking capacitor, the converter features automatic uniform current sharing characteristic of the four interleaved phases for voltage boosting mode without adding extra circuitry or complex control methods. The operation principle and steady analysis of the proposed converter are discussed. Finally, some simulation and experimental results are also presented to demonstrate the effectiveness of the proposed converter.
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