Low-power realization in main blocks of CMOS APS image sensor
2005
This paper addresses the optimization of power at the circuit level in the main blocks of CMOS APS image sensors. A pixel bias current of zero during the readout period is shown to reduce the static power and enhance the settling time of the pixel. A balanced operational transconductance amplifier (OTA) has been demonstrated to be a better candidate as an amplifier when employed in a correlated double sampling (CDS) circuit or as a comparator in an analog-to-digital (A/D) converter, as compared to a Miller two-stage amplifier. Using common-mode feedback (CMFB) in an OTA can further reduce the quiescent power of the amplifier. The low power capability of a CMFB OTA is discussed in this paper by performing a comparison with a conventional OTA using a 0.18 μm technology.
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