Memory-systems challenges in realizing monolithic computers
2018
This paper presents the notion of a monolithic computer , a future computer architecture in which a CPU and a high-capacity main memory system are integrated in a single die. Such computers will become possible in the near future due to emerging non-volatile memory technology. In particular, we consider using resistive random access memory, or ReRAM, from Crossbar Incorporated. Crossbar's ReRAM is dense, fast, and consumes zero static power. Also, it can be fabricated in a standard CMOS logic process , allowing it to be integrated into a CPU's die. The ReRAM cells are manufactured in between metal wires and do not employ per-cell access transistors, so the bulk of the transistors underneath the ReRAM arrays are vacant. This means a CPU can be implemented using a die's logic transistors (minus transistors for access circuits), while the ReRAM can be implemented "in the wires" above the CPU. This will enable massive memory parallelism, as well as high performance and power efficiency. We discuss several challenges that must be overcome in order to realize monolithic computers. First, there is a physical design challenge of merging ReRAM access circuits with CPU logic. Second, while Crossbar's ReRAM technology exists today, it is currently targeted for storage. There is a device challenge to redesign Crossbar's ReRAM so that it is more optimized for CPUs. And third, there is an architecture challenge to expose the massive memory-level parallelism that will be available in the on-die ReRAM. This will require highly parallel network-on-chip and memory controller designs, and a CPU architecture that can issue memory requests at a sufficiently high rate to make use of the memory parallelism.
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