Variability and Its Impact on Design

SUMMARY: As digital designs scale down into the sub-100nm regime, the effects of variations are seen to dramatically affect the behavior of the circuit. These may arise from: 1. Fluctuations attributed to the manufacturing process (e.g., drifts in channel length, oxide thickness, threshold voltage, or doping concentration), which affect the circuit yield. 2. Variations in the environmental operating conditions (e.g., supply voltage, temperature, or particle strikes that lead to soft errors) after the circuit is manufactured, which affect the correctness of the behavior of the design. These variations have been observed at the 90nm technology node, and trends show that this will be even more significant from the 65nm node onwards. Some of these variations are entirely deterministic (metal fill density, etc.), while others are random, as their cause is either unknown, unattributable, or too difficult to model. Either way, it is imperative to analyze their effects and design circuits to be tolerant to variations.Circuit performance, in terms of both timing and power, is shown to vary significantly under process and environmental variations. While timing can vary by unacceptably large amounts, a second important factor is the leakage power (which is becoming a major fraction of the total power): its exponential dependence on process parameters can lead to large swings in the power dissipation from die to die after manufacturing. Therefore, variationtolerant design is imperative for the design of next-generation digital integrated circuits. Traditional circuit design techniques tackle this by using several design corners, but they are insufficient under the magnitude and scale of these variations for several reasons: first, they are incapable of accurately predicting parametric yield, and second, they lead to the run-time explosion due to the increasing number of corner cases that need to be considered. While variation-tolerant design has been practice in the analog world for many years, the scale of digital problems, where circuits may have a billion transistors or more, renders those techniques inadequate.