Silicon p-FETs from ultrahigh density nanowire arrays

Statistical numbers of field-effect transistors (FETs) were fabricated from a circuit of 17-nm-wide, 34-nm-pitch Si nanowires boron doped at a level of 10^(18) cm^(-3). Top-gated 4-μm-wide Si nanowire p-FETs yielded low off-currents (∼10^(-12) A), high on/off ratios (10^5−10^6), good on current values (30 μA/μm), high mobilities (∼100 cm^2/V−s), and low subthreshold swing values (∼80 mV/decade between 10^(-12) and 10^(-10) A increasing to 200 mV/decade between 10^(-10)−10^(-8) A).