Design and Implementation of High Performance MIL-STD-1553B Bus Controller

In recent times, due to usage of avionics subsystems and the amount of data processed by them there is an increased demand for the usage of digital techniques in aircrafts. MIL-STD-1553 has evolved as an international standard for military applications. To meet the real world specifications, it is required to optimize the area and power and to improve the performance of the data bus. Now-a-days, speed of the system is very much important. But with the speedy improvements in modern avionics system, traditional MIL-STD-1553 bus cannot reach the need of high speed applications. This project aims at designing high performance MIL-STD-1553B bus controller which is compatible to Data Device Corporation (DDC). In most of the aircraft applications DDC devices have been used. The proposed system is designed using Verilog HDL and simulation is done in ModelSim. The area and time calculations have done in Design Compiler Tool of Synopsys. The functionality of the developed architecture is verified in Xilinx ISE 13.4.