A standard CMOS bridge-based analog interface for differential capacitive sensors

2017 
This work describes an analog electronic interface, based on a modified De Sauty AC bridge, performing a differential capacitive sensor estimation. A suitable feedback loop tunes a Voltage Controlled Resistor to balance the bridge. The electronic circuit has been designed in a standard integrated CMOS technology (AMS 0.35μm) with a low supply voltage (±1.5 V) and a reduced power consumption (lower than 4mW). PSpice simulation results show a very good agreement with theoretical expectations. The output voltage accuracy shows a 0.03V maximum absolute error for a range of ±50% of sensor variations from its baseline value. Very small baseline values are allowed (tens of μF).
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