Modelling and experimental analysis of the impact of process induced stress on the electrical performance of GaAs MESFETs

Abstract A combination of two-dimensional Finite Element Methods and two-dimensional electronic device simulations was implemented to evaluate the effects of stress-induced piezoelectric charge distributions on the performance of GaAs MESFETs. This study takes into account the overlayer stresses a priori thus allowing an assessment of the impact of changes in device structural parameters on the electrical characteristics of the device. A qualitative explanation for the dependency of both threshold voltage and subthreshold current slope on dielectric overlayer thickness is put forward. It is confirmed that a predominantly negative charge distribution under the gate region is preferable to a positive one as device performance is less sensitive to structural parameter variations.