Pre-Silicon Validation of 32-Bit Indigenous Processor for Space Applications

A 32-bit successor has been designed for the indigenous 16-bit processor used in the on-board computers of the operational satellite launch vehicles of ISRO. Significant improvements have been made in the areas of computational power, memory addressing capability, registers and data types. The instruction set is tailored for optimising performance in space-based applications. Verifying that the design is flawless prior to tape-out is a challenging task for the microprocessor design team. Zero tolerance of bugs is a pre-requisite for the processor, given the unforgiving nature of space applications. This paper describes the exhaustive validations carried out for evaluating the design of the 32-bit processor in the designer lab.