Timing verification of the 21264: A 600 MHz full-custom microprocessor

We present a new timing verification methodology that was used successfully to verify the Digital 21264 Alpha microprocessor. The 21264 design team devised a minimally constrained, aggressive circuit design style with a complex clocking methodology that demanded the creation of a versatile verification tool. We introduce a tool designed for minimum and maximum timing verification of critical and race paths on full-custom circuits. This tool employs sophisticated circuit classification algorithms, a large family of delay estimation techniques, and various path traversal strategies. First pass silicon of the 21264 microprocessor successfully ran multiple operating systems and no timing problems were identified.