Board-Level Reliability Performance of Enterprise and Datacenter SSD Form Factor (EDSFF)

Enterprise and Datacenter Solid State Drive (SSD) Form Factor (EDSFF) is introduced to optimize Non-volatile Memory (NVM) for next decade datacenter building blocks. The use of next generation 3D NAND on Printed Circuit Board Assembly (PCBA) is being driven by high-performance computing and data center demand for enterprise SSD. The selection of PCB, enclosure, and component design of EDSFF can affect board-level reliability (BLR) performance. BLR testing, also known as an interconnect reliability testing, is used to evaluate the quality and reliability of solder connections after mounting an integrated circuit package (BGA, CSP, QFN etc.) to a PCB. The thermal cycling condition required for BLR is from 0°C to +100°C and effect of operating conditions are discussed to ensure reliable performance. The design parameters in EDSFF are used to provide a detailed board level evaluation. By using Finite Element Analysis (FEA), the accumulated plastic work per cycle for entire board on drive level was calculated, which was then used to assess the worst NAND location. Based on thermal fatigue life model of solder joints, the life comparison index is calculated by using a technique submodeling FEA with finer mesh and more details geometry. FEA-Sub modelling system is accurate and reliable as it is validated to the real reliability testing data. 2 different EDSFF form factors; short and long were conducted for actual board-level thermal cycling tests. It was found that the cycles to failure and worst location on the board match well with experimental results. Following that, the effects of form factor, component stacking architecture, and PCB material selection were studied using design analysis. Overall, the smaller die-to-package ratio, thinner and higher Tg PCB prepreg help to enhance the fatigue life of the solder joint. The form factor, enclosure and drive assembly process are dominant factors for thermal cycling test (TCT) performance. In addition, underfill characterization on the fatigue life and fracture mode of the solder joint are discussed. Eventually, more robust EDSFF can be developed and manufactured based on the assessment of FEA modelling and real testing data.