An Unload and Load Request Logic for Semiconductor Fab Considering Inter-Bay Material Flow

2004 
The purpose of this paper is to develop and show the efficiency of the URL(Unload Request Logic) and LRL(Load Request Logic) of the dispatcher in the Fab(Fabrication) Manufacturing Execution System. These logics are the core procedures which control the material(wafer and glass substrate) flow efficiently in the semiconductor and LCD fab considering inter-bay as well as intra-bay material flow. We use the present and future status information of the system by look-ahead and the information about the future transportation schedule of Automated Guided Vehicles. The simulation results show that the URL and LRL presented in this paper reduce the average lead time, average and maximum WIP level, and the average available AGV waiting time.
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