Process and Device Considerations for Small Grain Polysilicon Transistors

Polysilicon transistors offer the first entry into 3-dimensional ICs. This paper reviews some process and device considerations in using these devices in VLSI environments. The process issues include the choice of polysilicon grain size, layer thickness, doping, and methods of grain boundary passivation. The device considerations are closely related to the effects of grain boundaries in modifying the device characteristics. Three specific application examples are reviewed. It is concluded that polysilicon transistors offer new possibilities to enhance the performance of bulk technologies without resorting to any recrystallization techniques.