Design of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses Measurement

A 15MS/s, 10 ppm repeatable acquisition system to characterize 3 μs rise-time trapezoidal voltage pulses is proposed. The system is based mainly on a low-noise, 5MHz bandwidth analog front-end. In this paper, the requirements, the concept and physical design are illustrated. Simulation results aimed at assessing the circuit performance are presented. An experimental case study on the characterization of a pulsed power supply for the klystrons modulators of the Compact Linear Collider (CLIC) under study at CERN is reported. In particular, the experimental metrological characterization of the prototype in terms of bandwidth and noise is presented.