Design and Analysis of Gate Engineered Dual Material Gate Double Gate Impact Ionization Metal Oxide Semiconductor

In this exposition, we have proposed the Dual Material Gate Double Gate Impact Ionization Metal Oxide Semiconductor (DMG DG IMOS) device with a gate engineered technique of Gate Stacking which is ordinarily used in MOSFET for performance augmentation. This paper compares the performance of four DG IMOS based devices i.e. Single Material Gate Double Gate IMOS (SMG DG IMOS), SMG Gate Stacked DG IMOS (SMG GS DG IMOS), DMG DG IMOS and DMG Gate stacked DG IMOS (DMG GS DG IMOS). The performance of all the devices has been investigated using 2-D simulations. The device structures of gate stacked devices have been developed with two gate oxides namely SiO2 and HfO2 and remaining parameters have been taken alike for all four devices. The doping concentration of source and drain regions for all four devices has been taken as 1020 cm−3 and the doping concentration of the intrinsic region has been taken as 1015 cm−3. The Gate Stacked devices showed better analog outcomes as compared to the other devices. The analog parameters evaluated include transconductance (gm), total gate capacitance (Cgg) and unity gain frequency (fT). The proposed design, DMG GS DG IMOS has been then analyzed for different channel lengths and dielectrics of gate oxide materials to optimize the gate engineered design for various applications.