A silicon compiler approach to the design of SOI ASIC's

A highly integrated, radiation hardened silicon compiler (RHSC) capable of totally automating the rad hard ASIC (application-specific integrated circuit) design process is described. The RHSC is built on two proven technologies, the Cascade ChipCrafter design tools and the Honeywell SOI (silicon-on-insulator) process. SOI provides the foundation to utilize extensive existing module generator software while meeting radiation hardness requirements. In addition, SOI offers a significant density and performance advantage compared to bulk. The design tools automatically perform power analysis and routing, electromigration analysis and routing, and clock skew minimization. With the high level of integration offered by the RHSC, no knowledge of integrated circuit design or radiation hardened electronics is required for SOI ASIC product development. >